Explore projects

A fast RV32IZifencei soft core implementation with a 2 stage pipeline(ish), written in SystemVerilog!

The Jekel Fractal Engine

Basic interpreter (PS2 Keyboard and composite) using 2 stm32f103c8t6 mcus.

ECE250 Testcases and Autograder

Import of STM32 composite code that I developed locally

A program written in C for quickly generating mandelbrot BMP images

The Inextensible RISC-V Emulator

Hardware-Agnostic Collection of RISC-V Programs, Testfiles, And More

The Little Engine That Could (Run Linux) :)

Contains software to run on JZJCoreX cores

Performant RISC-V Processing

Let's do this this time.

C standard library implementation in Rust

Paper: https://ieeexplore.ieee.org/document/10545398

rv32esim interpreter in C

Rust interpreter for iverilog compiled VVP target files.

Also potentially the start of an IEEE 1800 simulator in Rust.