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  • C 22.5%
  • C++ 11.2%
  • CMake 7.1%
  • Rust 0.6%
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Eric Jessee bf1e00e881
 Adding illegal instruction emulation support (#2) 
* try to trigger illegal instruction with div

* add soft exceptions to build

* beginnings of soft exception handler. r-type decoding added!

* change one comment

* rename soft_exceptions to soft_instructions

* add newline to end of files

* restore hello_world.c to original state, create illegal_instruction_experiments.c

* added file descriptions

* added support for rem, remu, and div

* added prototypes for misaligned access handlers

* added comment about bitfield struct, fixed some compile errors

* added mul support

* fixed sign extension for mulh and mulhsu, added inline asm to test

* support for division overflow, and improvements to test cases

* add eric to LICENCE!

* add maybe_unused to avoid release mode build errors
2024-03-23 16:05:21 -04:00
firm Add directories to the repo 2023-06-14 22:02:11 -04:00
include Improve UART testing 2024-02-17 18:01:01 -05:00
irve_legacy_rust Update RVSW Copyright information and cleanup code 2024-01-15 20:38:31 -05:00
lib Update RVSW Copyright information and cleanup code 2024-01-15 20:38:31 -05:00
sbi Adding illegal instruction emulation support (#2) 2024-03-23 16:05:21 -04:00
src Adding illegal instruction emulation support (#2) 2024-03-23 16:05:21 -04:00
.gitignore Add the first test c program 2023-06-16 21:30:34 -04:00
cloc.sh Add a collection of examples from cppreference 2023-07-01 15:56:16 -04:00
CMakeLists.txt Improve SBI Spec Implementation Accuracy 2024-03-07 08:00:39 -05:00
example_config.cmake Add a test program to test 16550 UART writes! 2024-01-30 19:56:46 -05:00
example_linker_script.ld Update RVSW Copyright information and cleanup code 2024-01-15 20:38:31 -05:00
LICENSE Adding illegal instruction emulation support (#2) 2024-03-23 16:05:21 -04:00
macros.cmake Update RVSW Copyright information and cleanup code 2024-01-15 20:38:31 -05:00
README.md Update RVSW README.md 2024-03-09 22:11:22 -05:00

README.md

rvsw

src: Contains test/example RISC-V programs

lib: rvsw Library Code usable by test/example programs in the src directory

firm: Contains reusable firmware code/libraries for multiple hardware projects

sbi: Contains a RISC-V SBI implementations that firmware can use and that S-Mode test/example programs (or even the Linux kernel) can use

Licensing

RVSW code

See the LICENSE file for more info

jzjcoresoftware

Several programs are from this old project of mine from grade 11 :)

MIT License

Copyright (c) 2020 John Jekel

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.