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Performant RISC-V Processing

A small core implementing a custom ISA running on the same clock as a VGA driver. Written in SV, with the purpose of refreshing myself on how to use the HDL (I'm a bit rusty :))

VSmile EMUlator in Rust

Basic interpreter (PS2 Keyboard and composite) using 2 stm32f103c8t6 mcus.

Raw FFI bindings for the SystemVerilog DPI, PLI, and VPI interfaces (IEEE 1800).

Idiomatic Rust abstractions and raw bindings for the SystemVerilog DPI, PLI, and VPI interfaces.

Hardware-Agnostic Collection of RISC-V Programs, Testfiles, And More

rv32esim interpreter in C

A program written in C for quickly generating mandelbrot BMP images

C standard library implementation in Rust

Let's do this this time.

A fast RV32IZifencei soft core implementation with a 2 stage pipeline(ish), written in SystemVerilog!

Contains software to run on JZJCoreX cores

The Jekel Fractal Engine

Import of STM32 composite code that I developed locally

Bloat-less library/initialization routines needed to write in c for the blue pill arm dev board

A simple Rust library to translate from English to Pig Latin!

A continuation of http://git.jekel.ca/JZJ/atmegaclock.