Chipyard Framework

Quick Links

• Stable Documentation: https://chipyard.readthedocs.io/
• User Question Forum: https://groups.google.com/forum/#!forum/chipyard
• Bugs and Feature Requests: https://github.com/ucb-bar/chipyard/issues

Using Downstream (Blinded) Chipyard

To get started using Chipyard, see the stable documentation on the Chipyard documentation site: https://chipyard.readthedocs.io/

Some useful links include (though you may need to look at older versions):

• https://chipyard.readthedocs.io/en/stable/Chipyard-Basics/Initial-Repo-Setup.html

• https://chipyard.readthedocs.io/en/stable/Simulation/Software-RTL-Simulation.html

As a summary, to run Downstream (Blinded) Chipyard when starting out, you'll likely want to do something similar to the following:

#One-Time Setup
#Install Conda onto your system with Miniforge (https://github.com/conda-forge/miniforge/#download)
#Then do the following:
conda install -n base conda-lock=1.4
conda activate base

#Per-Repo-Clone Setup
git clone <this repo's url>
cd chipyard
git switch <Either the `bc-version-bump` or the `blime-multiclient` branch>
./build-setup.sh riscv-tools

#Per-Session Setup
source ./env.sh
conda env list #To ensure everything's in order

#Simulation (BliMe-Gemmini + BliMe-Boom)
cd sims/verilator
make -j32 CONFIG=CustomGemminiSoCConfig VERILATOR_THREADS=32 BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/isa/rv64ui-p-simple
#Look in the `output` directory for a VCD file

Using Upstream Chipyard

To get started using Chipyard, see the stable documentation on the Chipyard documentation site: https://chipyard.readthedocs.io/

Some useful links include:

• https://chipyard.readthedocs.io/en/stable/Chipyard-Basics/Initial-Repo-Setup.html

• https://chipyard.readthedocs.io/en/stable/Simulation/Software-RTL-Simulation.html

As a summary, to run upstream Chipyard when starting out, you'll likely want to do something similar to the following:

#One-Time Setup
#Install Conda onto your system with Miniforge (https://github.com/conda-forge/miniforge/#download)
#Then do the following:
conda install -n base conda-lock=1.4
conda activate base

#Per-Repo-Clone Setup
git clone https://github.com/ucb-bar/chipyard.git
cd chipyard
git checkout <Latest chipyard git tag here>
./build-setup.sh riscv-tools

#Per-Session Setup
source ./env.sh
conda env list #To ensure everything's in order

#Simulation (Rocket)
cd sims/verilator
make -j32
make -j32 run-binary-debug VERILATOR_THREADS=32 BINARY=$RISCV/path/to/elf/file/to/test.riscv
#Look in the `output` directory for a VCD file

#Simulation (BOOM)
cd sims/verilator
make -j32 CONFIG=LargeBoomConfig
make -j32 run-binary-debug CONFIG=LargeBoomConfig VERILATOR_THREADS=32 BINARY=$RISCV/path/to/elf/file/to/test.riscv
#Look in the `output` directory for a VCD file

What is Chipyard

Chipyard is an open source framework for agile development of Chisel-based systems-on-chip. It will allow you to leverage the Chisel HDL, Rocket Chip SoC generator, and other Berkeley projects to produce a RISC-V SoC with everything from MMIO-mapped peripherals to custom accelerators. Chipyard contains processor cores (Rocket, BOOM, CVA6 (Ariane)), accelerators (Hwacha, Gemmini, NVDLA), memory systems, and additional peripherals and tooling to help create a full featured SoC. Chipyard supports multiple concurrent flows of agile hardware development, including software RTL simulation, FPGA-accelerated simulation (FireSim), automated VLSI flows (Hammer), and software workload generation for bare-metal and Linux-based systems (FireMarshal). Chipyard is actively developed in the Berkeley Architecture Research Group in the Electrical Engineering and Computer Sciences Department at the University of California, Berkeley.

Resources

• Chipyard Stable Documentation: https://chipyard.readthedocs.io/
• Chipyard (x FireSim) Tutorial: https://fires.im/tutorial
• Chipyard Basics slides: https://fires.im/isca22-slides-pdf/02_chipyard_basics.pdf
• Chipyard Tutorial Exercise slides: https://fires.im/isca22-slides-pdf/03_building_custom_socs.pdf

Need help?

• Join the Chipyard Mailing List: https://groups.google.com/forum/#!forum/chipyard
• If you find a bug or would like propose a feature, post an issue on this repo: https://github.com/ucb-bar/chipyard/issues

Contributing

• See CONTRIBUTING.md

Attribution and Chipyard-related Publications

If used for research, please cite Chipyard by the following publication:

@article{chipyard,
  author={Amid, Alon and Biancolin, David and Gonzalez, Abraham and Grubb, Daniel and Karandikar, Sagar and Liew, Harrison and Magyar,   Albert and Mao, Howard and Ou, Albert and Pemberton, Nathan and Rigge, Paul and Schmidt, Colin and Wright, John and Zhao, Jerry and Shao, Yakun Sophia and Asanovi\'{c}, Krste and Nikoli\'{c}, Borivoje},
  journal={IEEE Micro},
  title={Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs},
  year={2020},
  volume={40},
  number={4},
  pages={10-21},
  doi={10.1109/MM.2020.2996616},
  ISSN={1937-4143},
}

• Chipyard
  • A. Amid, et al. IEEE Micro'20 PDF.
  • A. Amid, et al. DAC'20 PDF.
  • A. Amid, et al. ISCAS'21 PDF.

These additional publications cover many of the internal components used in Chipyard. However, for the most up-to-date details, users should refer to the Chipyard docs.

• Generators
  • Rocket Chip: K. Asanovic, et al., UCB EECS TR. PDF.
  • BOOM: C. Celio, et al., Hot Chips 30. PDF.
    • SonicBOOM (BOOMv3): J. Zhao, et al., CARRV'20. PDF.
    • COBRA (BOOM Branch Prediction): J. Zhao, et al., ISPASS'21. PDF.
  • Hwacha: Y. Lee, et al., ESSCIRC'14. PDF.
  • Gemmini: H. Genc, et al., DAC'21. PDF.
• Sims
  • FireSim: S. Karandikar, et al., ISCA'18. PDF.
    • FireSim Micro Top Picks: S. Karandikar, et al., IEEE Micro, Top Picks 2018. PDF.
    • FASED: D. Biancolin, et al., FPGA'19. PDF.
    • Golden Gate: A. Magyar, et al., ICCAD'19. PDF.
    • FirePerf: S. Karandikar, et al., ASPLOS'20. PDF.
• Tools
  • Chisel: J. Bachrach, et al., DAC'12. PDF.
  • FIRRTL: A. Izraelevitz, et al., ICCAD'17. PDF.
  • Chisel DSP: A. Wang, et al., DAC'18. PDF.
  • FireMarshal: N. Pemberton, et al., ISPASS'21. PDF.
• VLSI
  • Hammer: E. Wang, et al., ISQED'20. PDF.

Acknowledgements

This work is supported by the NSF CCRI ENS Chipyard Award #201662.